fibresystems.org is delighted to welcome Jeff Ferry, Director of Communications for Infinera, and a former journalist, as a guest blogger this week. Jeff will be reporting on the OIDA's Photonic Integration Forum, which is the first industry conference dedicated to the commercial development of photonic integration technology. As such it marks an important step forward for this technology area. The conference has been co-organised by OIDA and Infinera.
The conference attracted an impressive 60 experts in photonic integration, says Jeff, filling the room to capacity at the picturesque Monterey Hotel and Spa, perched up against, and partially built out over, Monterey Bay, 100 miles south of San Francisco. So without further ado, over to Jeff...
Tuesday, 7 October, OIDA Photonic Integration Forum, Day One
By Jeff Ferry
Photonic integration
The two most interesting themes of the conference's first day were scalability and power consumption. The debate over scalability turned into a discussion of integration on indium phosphide vs. integration on silicon. The indium phosphide (InP) supporters, led by Infinera, have the benefit of having large numbers of photonic integrated circuits deployed by real customers. According to the chart shown by Infinera co-founder Dave Welch, Infinera has accumulated 101 million hours of PICs running in live networks without a single failure, with each PIC pair integrating 60 devices. That translates to a FIT rate (reliability measure) of 9, which is better than many single lasers and modulators in the market today. "Everything gets better when you integrate, reliability, yield, performance, and costs," said Welch.
Later in the day, Infinera PIC engineer Randy Salvatore provided some insight into how Infinera has achieved its reliability and yields, describing the six stage statistical process control methodology that Infinera borrowed from the silicon industry and applied at its PIC fab. According to Salvatore, when compared to silicon chips and specifically Intel's well-documented history, Infinera has in the last two years made progress equivalent to six years' worth of Intel progress, moving from defect density numbers equivalent to Intel's in 1987 to numbers comparable to Intel in 1993. This, said Salvatore, is the silicon learning curve successfully applied to InP.
Professor John Bowers of University of California at Santa Barbara emerged as the most charismatic advocate of silicon photonics. He showed slides on his UCSB team's progress in several areas, including high-quality photodetectors made from silicon germanium, hybrid lasers made from a combination of III-V materials and silicon, and on the manufacturing side, they've reduced the time required to bond the two materials together from 12 hours to as low as 10 minutes — an important step towards making the technology practical, reliable, and commercial. Bowers said that silicon CMOS technology makes it possible to reduce device size to the point where it becomes possible to get as many as 125,000 die sites (i.e. chips) on an 8 inch wafer. All those developments go towards making silicon photonics PICs more cost-effective than any other material, said Bowers. "Infinera is doing a great job, but the potential for lots more scaling exists," Bowers said. "The platform for VLSI PICs exists. Millions of devices [on a chip] is possible."